TechSpot

Intel proposes the x86-S architecture for a simpler, more efficient CPU instruction set

Forward-looking: After being beaten by AMD in introducing the first, truly 64-bit instruction set in the x86 CPU world, Intel is now trying to get ahead of its historical competitor by working on a ...
Semiconductor Engineering

Dual Instruction-Set Architecture, Supporting A TTA And RISC-V Instruction Set Via a Lightweight Microcode Hardware Unit

A technical paper titled “Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode” was published by researchers at Tampere University. “Transport triggered architectures ...
Liliputing

Chinese chip maker Loongson has designed its own CPU instruction set architecture (ISA)

Chinese chip maker Loongson used to make processors based on MIPS architecture, but MIPS isn’t what it used to be and the company that developed the technology has even pivoted to making chips using ...
Digi Times

China CPU maker Loongson keen to build own instruction set ecosystem

China-based CPU designer Loongson Zongke Technology has pledged to build a homegrown CPU instruction ecosystem independent of Wintel and Android-ARM, and all its products will switch to the ...
AppleInsider

Apple investigating RISC-V instruction set architecture, job listing shows

A job listing posted to Apple's website this week reveals the company is researching RISC-V instruction set architecture solutions, suggesting future in-house chip designs might implement the ...